Preliminary API Development
Write Hardware Design Guidelines.
Simple Processor Design
PCI Express Interface from Altera FPGA to Intel Atom processor
Update (11/04/12): Updated first milestone to include development of API and Hardware Design Guidelines and moved down a couple of milestones to Second Milestones.
Update (10/25/12): We are a couple days behind schedule. We are currently having trouble with Quartus, our developing platform. Once we get this problem solved, we will be working a little extra this weekend to get back on schedule and we should have our first milestones completed by the presentation date. The PCI interfacing is having some problems of its own but it is not a big setback.
Pass Data to FPGA and retrieve answer back using a very simple adder co-processor defined in FPGA
Enable interrupt based notification of task completed.
Enable high speed data transfers and CPU offloading by enabling Direct Memory Access (DMA) transfer for data.
Update: None.
Develop Linux driver for reference co-processor.
Publish Application Programming Interface (API) Document.
Publish Hardware Design Guidelines.
Release first version of reference co-processor.